The present invention relates to a multi-layered metal line of a semiconductor device and a method for forming the same, and more particularly, to a multi-layered metal line of a semiconductor device that can improve the characteristics of a diffusion barrier and thereby improve the characteristics and reliability of a semiconductor device and a method for forming the same.
Generally, in a semiconductor device, metal lines are formed to electrically connect elements or lines with each other. Contact plugs are formed to connect lower metal lines and upper metal lines with each other. As a design rule decreases to conform to the trend toward high integration of a semiconductor device, the aspect ratio of a contact hole in which a contact plug is formed gradually increases. As a result, the difficulty and importance of a process for forming the metal line and the contact plug has been noted.
Aluminum (Al) and tungsten (W) have been mainly used as a material for the metal line of a semiconductor device since they have good electrical conductivity. Recently, research has been made for using copper (Cu) as a next-generation material for a metal line due to copper having excellent electrical conductivity and low resistance when compared to aluminum and tungsten. Copper can therefore solve the problems associated with RC signal delay in the semiconductor device having a high level of integration and high operating speed.
Since copper cannot be easily dry-etched into a wiring pattern, a damascene process is employed to form a metal line using copper. In the damascene process, a metal line is formed such that after etching an interlayer dielectric and thereby defining a damascene pattern, a metal layer, i.e., a copper layer is filled in the damascene pattern.
The damascene pattern is formed through a single damascene process or a dual damascene process. Where applying the dual damascene process, an upper metal line and a contact plug for connecting the upper metal line and a lower metal line can be simultaneously formed. Since surface undulations that are produced due to the presence of the metal line can be removed, a subsequent process can be conveniently conducted.
When forming a multi-layered metal line using the damascene process, where copper is used as the material for a lower metal line and aluminum is used as the material for an upper metal line, as different metals are joined with each other, a high resistance compound may be produced due to diffusion of the respective metals. Therefore, in order to prevent the high resistance compound from being produced, a diffusion barrier must be formed on the interface of the lower metal line made of a copper layer and the upper metal line made of an aluminum layer. Generally, a Ti layer, a TiN layer, a Ta layer or a TaN layer is used as the diffusion barrier.
In the conventional art as described above, the diffusion barrier must have a sufficient thickness to stably perform its function. Although it is possible to prevent the high resistance compound from being produced between the metal lines if the diffusion barrier has a sufficient thickness, as the proportion of the aluminum layer decreases, contact resistance cannot be decreased sufficiently.
Conversely, the thickness of the diffusion barrier may be reduced to improve the decrease in the contact resistance. However, due to the diffusion of aluminum as the material of the upper metal line, voids can be formed in the aluminum layer and a high resistance compound is likely produced. As a result, the contact resistance can be increased and the semiconductor device characteristics and reliability can deteriorate.